Alberto Ros: Non-Speculative Reordering of Memory Operations with Strong Consistency

High-performance multicores speculatively reorder memory operations. If a memory reordering is seen by other cores, speculative operations are squashed and re-executed.

This talk offers a background about memory-level speculation in current multicores. Then, it shows that, for the case of the load-load reordering, is not necessary to squash and re-execute reordered loads to guarantee the load-load order. Instead, the reordering can be hidden form other cores by the cache coherence protocol. The implication is that the processor can irrevocably bind speculative loads. This allows the processor, for example, to commit reordered loads out-of-order without having to wait (for the loads to become non-speculative) or without having to checkpoint committed state (and rollback if needed), just to ensure correctness in the rare case of some core seeing the reordering. This solution has no performance cost, is deadlock free, and increases the performance of out-of-order commit by a sizable margin, compared to the base case where memory operations are not allowed to commit if the consistency model could be violated.

Alberto RosAlberto Ros is Associate Professor at the University of Murcia, Spain. He received the PhD degree in computer science from the same university, in 2009, after being granted with a fellowship from the Spanish government to conduct the PhD studies. He hold postdoctoral positions at the Technical University of Valencia and at Uppsala University. He has co-authored more than 60 research papers in international journals and conferences. His research interests include cache coherence protocols, memory hierarchy designs, and memory consistency for multicore architectures.